A conventional complementary polarity MOSFET-based analog signal switching circuit FIG. 1a for controllably passing signals, such as audio or digital data signals, between input and output ports thereof is schematically illustrated in FIG. 1a. As shown therein, the switching circuit comprises a PMOS transistor MP1 and an NMOS transistor MN1, which have their source-drain paths connected in parallel between an input port or terminal IN and an output port or terminal OUT. The gate of the NMOS transistor MN1 is connected directly to a CONTROL terminal, while the gate of PMOS transistor MP1 is coupled through an inverter INV to the CONTROL terminal.
In operation, a prescribed maximum or minimum control voltage is applied via the CONTROL terminal to the gate terminals of the two complementary MOSFETs, in order to turn these switching devices OFF or ON, and thereby control the conductive or signal pass-through state of the switching circuit. MOSFETs MN1 and MP1 are complementary polarity devices to accommodate input signals that may extend to the voltage extremes, so that, when one MOSFET is off (so as to block the passage of signals therethrough), the other (complementary polarity) MOSFET is on (in a low resistance state, so as to allow the passage of signals therethrough).
An input signal applied to the input terminal IN serves as the source voltage for, and thereby determines the ON-resistance of, each MOSFET. The gate-to-source voltage can be less than the threshold voltage of either MOSFET, which puts it into the cut-off region of operation. This occurs when the input signal approaches the voltage of the positive or negative power supply rail.
FIGS. 1b and 1c illustrate variations of resistance vs. input voltage for the individual PMOS transistor and the NMOS transistor, respectively, of the CMOS-based analog switching signal circuit of FIG. 1a. As shown in FIG. 1b, as the input voltage increases, the ON-resistance of the P-channel device decreases, while FIG. 1c shows that the ON-resistance of the N-channel device increases with an increase in input voltage. FIG. 1d illustrates that the combined ON-resistance of the parallel combination of the P-channel and N-channel MOSFETs of the analog signal switching circuit FIG. 1a has a slightly undulating variation with input voltage.
Where it is desired to controllably interface multiple types of signals through a commonly shared port, it has been conventional practice to replicate the switch circuit of FIG. 1a for each type of signal, and then connect such switching circuits in parallel between the commonly shared port and separate signal terminals or ports associated with the various signal types. Thus, an application for coupling both audio signals and high speed digital data signals would entail a parallel combination of two of the dual MOSFET switching circuits of FIG. 1a—one for audio signals and the other for high speed digital data signals.
Unfortunately, such a replicated switch-based architecture has a number of inherent drawbacks. A first is the fact that the overall circuit occupation area is fairly substantial, since each signal switching path involves the same parallel combination of dual MOSFET switching circuits. This results in high cost and substantial capacitive loading at the common terminal. A second shortcoming is the fact that the gate-to-source voltage of the audio circuit's switching MOSFETs varies with the analog (audio) signal, which produces modulation of the ON-resistance of the switching MOSFETs, thereby causing distortion of the audio signal.